The monolithic core design was for many years the most popular and widely used choice in the semiconductor world, but the increasing complexity of this type of design and the high costs of transferring it to the wafer made it necessary to look for other more efficient and cost-effective alternatives. AMD found what it needed in MCM designs, and this evolved into a chiplet design.
The chiplet is a small chip that can contain different elements in its own package, and is designed to be able to be easily integrated and interconnected with other chiplets, whether following a 2D layout, which is the most common, or in 3D, which is much less frequent, although these types of implementations have shown to have great potential, we only have to see what AMD has achieved with the Ryzen with 3D stacked cache.
Chiplets can contain the basic parts of a CPU, a GPU, I/O elements, and also additional L3 cache, among other things. This greatly simplifies the creation of complex solutions, such as a CPU with a high core count, since instead of creating a huge silicon wafer with a large number of elements, the chiplets can contain the basic parts of a CPU, a GPU, I/O elements, and also additional L3 cache, among other things. We can divide it into small interconnected chiplets.
What advantages does the chiplet offer?
I’ve already given you a preview in the previous paragraph. The chiplet makes it possible to simplify the design and creation of highly complex processors and graphics cores by dividing their parts into multiple chiplets. It also facilitates execution on the wafer, increases the success rategreatly reduces costs and increases the technical and economic feasibility of designs that would be practically impossible with a monolithic model.
I’ll give you an example to understand it better. Think about a 128-core processorto make this a reality using a monolithic core design we would have to have a design and a node capable of cramming 128 cores, with their caches and all their elements, into a single silicon wafer. But that’s not all, every chip would have to be perfect, we would have no margin for error.
If a chip comes out with 120 functional cores It would no longer serve usand we would have to scrap that chip or repurpose it to sell it as an inferior product. We could also encounter failures in the I/O system or in the caches, which could end up disabling the chip entirely. Because it is a very complex chip, the chances of something going wrong are very high, and this reduces its viability on the wafer, increases complexity and space occupied on the wafer, and can drive up costs.
In red we can see the CPU chiplet, and in green the I/O chiplet.
With the chiplet the approach would be very different, and I’m going to use AMD as an example, because it has been the company that has bet most strongly on this type of design. The Sunnyvale giant would use of the types of chiplets to create that 128-core processor:
- The CPU chiplet, which has 8 cores and 16 threads, and features 32 MB of L3 cache.
- The I/O chiplet, which integrates the entire connectivity subsystem and memory controllers.
To bring a 128-core processor to life, AMD needs 16 chiplets CPU y un chiplet I/O. Producing 8-core chips is much simpler, the chances of something going wrong are minimal, and its impact on both wafer space and cost is reduced. is much lowerBut that’s not all, these types of designs are also highly scalable, and allow the use of silicon to be adjusted precisely to adapt it to the real needs of each user profile and avoid unnecessary costs.
The chiplet is also highly scalable. Thanks to this modular design AMD can create very powerful general-purpose processors with one or two chiplets (up to 16 cores and 32 threads), and scale that same design in its AMD EPYC Genoa processors with up to 16 chiplets, totaling up to 128 cores and 256 threads.
Thanks to this type of design, creating processors with a higher number of cores is almost as easy as a Lego game: just add as many CPU chiplets as necessary, interconnect them and that’s it.
Typically chiplet scaling is done through 2D arrangement and interconnection, but AMD has also been able to scale through 3D stacking, which has allowed for a huge increase in the amount of cache available. The most popular example is the Ryzen 5000X3D and Ryzen 7000X3D, which feature up to 128MB of L3 cache, but AMD has also brought this technology to its EPYC processors, and has been able to create solutions with up to 1,152MB L3 cache.
A look into the future
AMD’s transition to an MCM design with Zen, and its commitment to the chiplet with Zen 2, marked a major shift in the industry that was consecrated with Zen 3an architecture that established the chiplet in an industry where monolithic core design was still being portrayed as the “only” viable option, when in fact it was beginning to become quite the opposite.
AMD’s present and future lies in the chiplet, but the race for this type of design is on has only just begun. Its use is slowly spreading, and it is only a matter of time before we start seeing it in a greater number of technological solutions, ranging from processors to graphics cards, accelerators and other types of high-performance computing units.
With the birth of the Universal Chiplet Interconnect Express, not only was the importance and transformative role of the chiplet confirmed, but it also made clear a proposal as ambitious as it is interesting for the future of this type of design, the possibility that the major players in the sector can combine chiplets from different brands in a single package. Consider, for example, a processor with two AMD CPU chiplets and one non-AMD GPU chiplet. Interesting, right? But this wouldn’t be possible with a monolithic core design.
Obviously we will also see solutions more powerful and efficient which will also have higher costs and viability at the wafer level, thanks to the differential value offered by the chiplet.
Source: www.muycomputer.com
